This invention relates to testing of memory modules, and more particularly to testing memory modules having a configuration memory.
Electronic systems such as personal computers (PC's) often use small printed-circuit board (PCB) daughter cards known as memory modules instead of directly mounting individual memory chips on a motherboard. The memory modules are built to meet specifications set by industry standards, thus ensuring a wide potential market.
As more and more configurations of memory modules are specified, often with many different memory configurations being interchangeable with one another, the PC or other system must determine the exact configuration of any memory modules installed. Memory-sizing routines can be executed by the PC at boot-up, but more recently the configuration information is being stored on the memory module itself. A small programmable memory chip is added to these modules. The programmable memory is programmed with the specific configuration of that module. The PC can simply read the configuration from this memory rather than run the memory-sizing routine.
FIG. 1A shows a memory module having a programmable configuration memory. Memory module 10 includes one or more dynamic-random-access memory (DRAM) chips 18 that are accessible through one or more rows of metal contacts that fit into a socket on the PC motherboard.
Memory module 10 also contains an electrically erasable and programmable read-only memory, EEPROM chip 20. The configuration of memory module 10 is programmed into EEPROM chip 20 by the module manufacturer. When memory module 10 is inserted into a socket on the PC motherboard, the PC reads the configuration in EEPROM chip 20 to determine the configuration of memory module 10.
This configuration information is determined by the size, type, and arrangement of DRAM chips 18. For example, the total number of bytes of storage, the width of the data bus, the number of column and row address bits, and the number or arrangement of banks can be programmed into EEPROM chip 20. Other useful information can be included, such as the type of DRAM chips 18 (clocked, non-clocked, etc.), timing parameters such as cycle and access times, voltages used, and burst capabilities. Revision codes and other information can also be stored.
Such configuration information can be stored in a relatively small amount of memory, such as in a 64-byte or 256-byte memory. EEPROM chip 20 can be reduced in the number of pins and cost by using serial data access rather than a byte-wide access. The PC can detect the presence of such an EEPROM chip 20 on memory module 10, and then read the configuration data out serially. Such an EEPROM chip 20 is sometimes known as a serial-presence-detect (SPD) EEPROM.
An expensive electronic test system can be used by the module manufacturer to test DRAM chips 18, and to write the configuration data to EEPROM chip 20. However, less expensive testers are desirable to reduce test costs. For example, modified PC motherboards have been used as testers of memory modules. See for example U.S. Pat. Nos. 6,357,022 and 6,415,397 by Nguyen et al. and Co et al., and assigned to Kingston Technology Company of Fountain Valley, Calif., These motherboard testers can cost 100 to 1000 times less than a specialized electronic test system since they are made from inexpensive PC motherboards.
FIG. 1B shows pre-programming a configuration EEPROM chip during testing of a memory module. PC motherboards read the configuration data from EEPROM chip 20 on memory module 10, so EEPROM chip 20 must be pre-programmed before testing by PC motherboard tester 14. Programmer 12 is a specialized device that generates signals to write the configuration information of memory module 10 into EEPROM chip 20.
Once EEPROM chip 20 has been programmed by programmer 12, then memory module 10 can be removed from programmer 12 and inserted into a socket on PC motherboard tester 14. FIG. 1C shows a PC motherboard testing a memory module with a pre-programmed EEPROM chip. Once memory module 10 is inserted into a socket on PC motherboard tester 14, the motherboard is re-booted, causing the PC initialization routines to search for and read the configuration information from EEPROM chip 20 on memory module 10. Then a memory test is performed by writing to and reading from each memory location in DRAM chips 18 on memory module 10. Failing modules can be identified and discarded.
When a low-cost PC motherboard tester is used, two separate steps are required: pre-programming the configuration EEPROM with programmer 12, and testing the memory module using PC motherboard tester 14. Since two test machines are used, two test stations and two insertion/removals are required, doubling the amount of handling required compared with testing a memory module without a configuration EEPROM.
The additional step of pre-programming the configuration into EEPROM chip 20 is required before testing by PC motherboard tester 14. This additional step requires that each memory module be inserted and removed from a socket on programmer 12, as well as be inserted and removed from a socket on PC motherboard tester 14. Pre-programming by programmer 12 is thus undesirable.
What is desired is a PC-motherboard tester that can test memory modules before configuration is programmed into an EEPROM chip on the memory module. An integrated tester that can test memory modules and then program configuration into the EEPROM chip is desirable.